ASIC Packaging Signal Integrity Hardware Engineering Technical Lead (Remote)
Cisco · San Jose, California, United States
About this role
The application window is expected to close on: 07/31/2026<p><span style="color:#000000"><b><span style="font-size:14px">Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received</span></b><span style="font-size:14px">.</span></span></p><p></p><p>This Hardware Engineering position is located in San Jose, CA, and is open to remote applicants residing within the United States.</p><h2></h2><h2>Meet the Team</h2><p>Cisco Silicon One (#CiscoSiliconOne) is a business organization with a long track record of building complex and high-performance Silicon ASICs. Our silicon devices drive the world’s most complex networks and carry over 90% of IP traffic. Cisco Silicon One is the only unifying silicon architecture in the market that enables customers to deploy the best-of-breed silicon from Top of Rack (TOR) switches all the way through web scale data centers and across service provider, enterprise networks, and data centers with a fully unified routing and switching portfolio
</p><p></p><p>We are a highly specialized ASIC team with experts in all aspects of advanced IC package design and heterogeneous system integration. Our substrates use the latest 2.5D fanout technologies for large-scale integration, using the latest signaling and data transfer technologies. Come join us and take part in shaping Cisco's ground-breaking solutions by designing, developing and testing some of the most complex ASICs being developed in the industry!</p><h2><br />Your Impact</h2><p>We are seeking a highly qualified Signal and Power Integrity Technical Lead to help us develop our next generation ASIC packaging and help define, design and verify ASIC packaging to be deployed in a range of Cisco platforms
</p><ul><li><p>Develop, document, and implement design rules for ultra-high-speed signaling, ensuring power, performance, and area goals are met for products.</p></li><li><p>Analyze substrate signal integrity (SI) and power integrity (PI
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