ASIC Engineering Analog Design Leader | high-speed optical transceiver circuits (modulator drivers, TIAs, CDRs, PLLs, ADC/DAC) | 12+ years, Bangalore

About this role

<h2>Cisco’s Client Optics Group (COG) designs & delivers the high-speed optical transceivers, and platforms that power Cisco's core data center networking solutions. We specialize in the design and integration of cutting-edge IM/DD optics and silicon photonic platforms that enable customers to deploy industry-leading optical technologies within data center with unprecedented speed, capacity, and reliability. Come join us and take part in shaping COG’s ground-breaking optical solutions by designing, developing, and testing some of the most advanced pluggable, and Co-packaged Optics (CPO) being developed in the industry.</h2><h2></h2><h2>You will work with Cisco's best-in-class Silicon Photonics team

Our team is responsible for driving the development and optimization of optical transceivers & modules (800G,1.6T & beyond) that seamlessly integrate with Cisco's routing, switching, and datacenter platforms, enabling customers to build scalable, high-performance networks that support emerging technologies including AI/ML workloads, and next-generation data center architectures.</h2><h2></h2><h2>We seek an experienced High Speed AMS Design Engineer to lead full-chip electrical specifications and mixed-signal design for Cisco's silicon photonics driver integrated circuits supporting 100G/200G/400G per Lambda solutions. You will own high-speed datapath and low-speed control circuit design for receive and transmit paths in our next-generation silicon photonics modules.</h2><h2></h2><h2><span><b>Your Impact</b></span></h2><h2></h2><h2>As a High-Speed Analog/Mixed-Signal (AMS) Design Leader, you will play a pivotal role in shaping next-generation silicon photonics driver ICs.</h2><h2>You will:</h2><ul><li><h2>Lead full-chip electrical architecture, specifications, and execution for high-speed silicon photonics driver ICs (100G/200G/400G per lambda)</h2></li><li><h2>Own end-to-end mixed-signal design for both transmit and receive paths, including high-speed datapath and low-sp

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