ASIC DFT Engineer || DFT/ATPG/MBIST/SCAN/JTAG || 8+ years
Cisco · Bangalore, India
About this role
<p><b>Meet the Team</b></p><p></p><p>Join the Cisco Silicon One team and drive innovation at the heart of next-generation network devices—Cisco Silicon One™. Our unique team operates in a startup-like environment within a world-class corporation, pushing the boundaries of advanced silicon technologies. Our design center brings together all silicon hardware and software development disciplines, promoting an atmosphere of collaboration, technical leadership, and excellence.</p><p></p><p>We are transforming the networking industry and building the future of the internet for the 5G era
With Cisco Silicon One™, we deliver a unified, programmable silicon architecture—the foundation of all Cisco’s future routing products. Our platform offers high-speed networking, programmability, power efficiency, and scalability for service provider and web-scale markets.</p><p></p><p><b>Your Impact</b></p><p></p><ul><li><p>Responsible for implementing the Hardware Design-for-Test (DFT) features that support ATE, in-system test, debug and diagnostics needs of the designs.</p></li><li><p>Responsible for development of innovative DFT IP in collaboration with the multi-functional teams, and play a key role in full chip design integration with the testability features coordinated in the RTL.</p></li><li><p>Work closely with the design/design-verification and PD teams to enable the integration and validation of the Test logic in all phases of the implementation and post silicon validation flows.</p></li><li><p>The job requires the candidate to have the ability to craft solutions and debug with minimal mentorship. </p></li><li><p>You are an ASIC Design for Test Hardware Engineer with 8-10 years of related work experience with a broad mix of technologies.</p></li></ul><p></p><p><b>Minimum Qualifications: </b></p><p></p><ul><li><p>Bachelor's or a Master’s Degree in Electrical or Computer Engineering required with at least 8-10 years of experience.</p></li><li><p>Knowledge of the latest innovati
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