R&D Engineer IC Design

About this role

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If you already have a Candidate Account, please Sign-In before you apply. Job Description: We are part of the core switching group (CSG) at Broadcom developing industry leading network switches for enterprise and mega scale data centers . We are looking for experienced engineers to design cutting edge CoWos 2.5D , 3D interposer designs

You will be working on designing interposers starting with custom routing for high speed interfaces, bump map design , routing and physical verification and tapeout to the foundries. As part of your job you will be interacting with packaging , signal integrity and foundries to meet the packaging, SI and physical requirements of the interposers. Experience with interposer designs including CoWoS, 2.5D/3D integration using Cadence Innovus/Integrity or Synopsys 3DIC compiler is a must

Candidates should have a strong understanding of TSV design, micro-bumps, solder bumps, and interconnect technologies. Strong automation expertise related to bump pattern generation , routing structure development for high speed interfaces, and chip finishing are required to handle multiple Interposer designs in parallel. Basic understanding of routing structure impact on high-speed signal integrity (SI), power integrity (PI), and thermal analysis is required

Technical Skills & Experience: Experience with interposer and advanced packaging design, including CoWoS, 2.5D/3D Proficiency with EDA tools such as Cadence (Innovus, Integrity), Synopsys (3DIC compiler), Mentor Graphics (Calibre) for layout generation, editing and verification Strong understanding of TSV design, micro-bumps, solder bumps, and interconnect technologies. Basic understanding of high-speed signal integrity (SI), power integrity (PI), and thermal analysis. Familiarity with semiconductor fabrication processes, particularly for silicon in

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