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Principal Design Engineer

Micron Technology · San Jose, United States

Engineering Engineering: General & Specialist Full-time Posted 4 days ago

About this role

Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The Principal Design Engineer in Micron’s NVEG organization contributes to the development of new memory products by assisting with the overall design, layout, and optimization of datapath circuits for NAND flash memory! This position will drive task forces and make strategic decisions on major datapath architectural changes influenced by new design specs such as higher speed/lower power

They will assess pros and cons of new architecture and drive all activities pertaining its implementation. The role will be expected to lead technical datapath design projects, advising the design planning, layout, and validation activities according to project timelines! What’s Encouraged Daily: Design and optimize TSV(Through-Silicon Via) interface circuits connecting memory die to logic die including Rx/Tx circuit for internal TSV channels, impedance matching and timing margin analysis. Develop and characterize TSV electrical models and define circuit design constraints for datapath interface

Define and implement signal integrity requirements for the TSV channel, including eye margin, crosstalk, and noise budget analysis Define and implement power integrity requirements using TSV for highly parallel IO and array operations Design and verify TSV-specific DFT (Design for Testability) circuits including loopback test modes, TSV continuity checks, and lane redundancy/remapping logic Collaborate with process technology and DTCO teams to optimize TSV design rules, standard cell usage, and layout strategies for the internal datapath Develop and implement functional verification plan for TSV interface and internal parallel bus including full chip circuit simulation and Verilog regression D

Apply for this role on Micron Technology’s official careers site.

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