Post-Training Platform Infrastructure Engineer
AMD · San Jose, California, United States
About this role
WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture
We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career
THE ROLE: We are looking for a systems-minded engineer who lives at the intersection of large-scale model inference, distributed systems, and performance optimization. This role focuses on post-training and inference infrastructure, with particular emphasis on P/D disaggregation, KV cache lifecycle management, and efficient offloading mechanisms across both inference and reinforcement learning (RL) systems. THE PERSON: You enjoy reverse-engineering modern ML infrastructure, reasoning about memory and compute tradeoffs, and turning research insights into production-grade features
You are comfortable diving into unfamiliar frameworks, understanding their architectural choices, identifying bottlenecks, and improving them through principled engineering. KEY RESPONSIBILITIES: Research and deeply understand modern LLM inference frameworks, including: Architecture and design tradeoffs of P/D (prefill / decode) disaggregation KV cache lifecycle, memory layout, eviction strategies, and reuse KV cache offloading mechanisms across GPU, CPU, and storage backends Analyze and compare inference execution paths to identify : Performance bottlenecks (latency, throughput, memory pressure) Inefficiencies in scheduling, cache management, and resource utilization Deve
Apply for this role on AMD’s official careers site.