Package Design Engineer
Broadcom · USA-CA San Jose Innovation Drive, United States
About this role
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If you already have a Candidate Account, please Sign-In before you apply. Job Description: Broadcom is seeking an experienced IC package-design engineer for complex flip-chip-BGA packages for industry-leading ASICs with high-speed SerDes and very-high-power delivery needs. You will be part of a worldwide R&D team developing high-performance package designs for ASICs for artificial intelligence (AI), networking, high-performance computing (HPC), and 5G base stations
These designs include SerDes at 224G and higher, 5G RF/Microwave ADC/DAC, HBM, DDR5 and more. You'll have the opportunity to collaborate with the team to create the package structures needed to enable new design, and contribute to efficiency improvements for our design team. RESPONSIBILITIES: Overall design responsibility for ASIC package designs, including aspects of signal integrity, power integrity, manufacturability, reliability, and thermal, in partnership with our experienced team of package engineering experts
Package Design of critical structures for SerDes, ADC/DAC, DDR, etc. Schedule, prioritize, & track your work across 2+ projects simultaneously General flip-chip BGA package design & engineering Project management and customer interface for your design projects Contribute to efficiency improvements for the design team, through process development/improvement, automation, documentation, etc. Physical design (layout) is a foundational responsibility in this role EDUCATION/EXPERIENCE & REQUIREMENTS: BSEE or similar field and 12+ years’ experience in flip-chip-BGA package design, including high-speed SerDes or MSEE or similar field and 10+ years’ work experience Knowledge of package-level signal integrity and power integrity, to apply to package designs Cadence APD (allegro package designer) experience is preferred
Equivalent tool is OK. Cooper
Apply for this role on Broadcom’s official careers site.