Manager, Advanced Packaging Design Enablement Engineering (APDEE)
Micron Technology · Hyderabad - Phoenix Aquila, India
About this role
Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Advanced Packaging Technology Development org is seeking an experienced and technically strong Die Design & Layout Manager to lead our die design and layout engineering function in support of our High Bandwidth Memory (HBM) packaging program
This role sits at the critical intersection of silicon design and advanced packaging, responsible for defining and executing die-level design strategy that enables world-class HBM product integration. You will lead a team of die design and layout engineers, own the die design methodology and sign-off flow, and serve as the primary technical bridge between silicon design, packaging, process integration, and product engineering teams. Your work directly impacts the performance, yield, reliability, and time-to-market of next-generation HBM products used in AI, HPC, and data center applications
Key Responsibilities Team Leadership & Management Lead, mentor, and grow a team of die build and layout engineers across multiple experience levels. Define team goals, individual development plans, and performance expectations aligned with program breakthroughs ∙ Build team capability in advanced packaging-aware layout techniques, 3D integration design rules, and DFT-aware layout ∙ Own the end-to-end die design and layout strategy for HBM die programs, from concept through tape-out and post-silicon validation ∙ Define die floorplanning strategy including TSV grid placement, micro-bump array layout, power domain partitioning, and KOZ management ∙ Establish and maintain die design rules in alignment with foundry PDK requirements and advanced packaging process constraints Technical Functional Roles & Responsibilities • PWF Reticles Design and tape
Apply for this role on Micron Technology’s official careers site.