Experienced SoC Design Engineer

About this role

Job Overview: Are you an RTL engineer eager to build expertise across multiple IP products? Do you want to work globally with internal teams to develop systems optimized for performance and power? If so, we want to speak with you! We're seeking a hard-working, creative, and motivated SoC engineer to join the team developing sophisticated processing systems used in IoT, Automotive, and Infrastructure computing. Responsibilities: As a creative design engineer with a knowledge of subsystems and SoCs you will be part of a team integrating IPs and developing logic for subsystems. You will need to understand and review the subsystem architecture, and develop the microarchitecture specifications, review verification test plans and help debug and fix issues, as well as work with the performance analysis team to evaluate and improve system performance

Your key responsibilities will include understanding incoming IPs, their functionality, interfaces and interworking with various subsystem and SoC components, developing subsystem microarchitecture specifications and RTL, proposing refinements to IP teams based on system-level integration and usage, running various design checks and fixing bugs. You will identify areas of improvement and enhance the design methodologies used by the team and by the wider organization. You will guide and support other members of the team as needed to enable the successful completion of project activities while balancing other tasks including working with Project Management on drawing-up and managing plans and schedules

Required Skills and Experience: Bachelor’s or Master’s degree in Electrical/Computer Engineering or a related field, or equivalent experience in place of either degree. Experience in digital hardware design and Verilog HDL Detailed understanding of current methods and techniques for complex SoC development Experience in static design checks, including CDC, RDC, X-prop, lint Experience creating design specifications Proficiency in

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